VLSI

超大规模集成电路

常用释义

abbr. 超大规模集成电路（very large-scale integration）

扩展信息

超大规模集成电路(Very Large Scale Integration)

超大规模集成电路(VLSI)静电放电保护调试的新方法超大规模集成电路(VLSI)静电放电保护调试的新方法隐藏>>你可能喜欢文 …

超大型积体电路

在超大型积体电路(VLSI)被广泛运用的今天，在电脑辅助设 (CAD)中，有关矽编译器 (Silicon compiler)方向的研究日趋重要。矽 …

超大型积体电路(very large scale integrated)

...关键技术,设计了具有数据处理速度和超大规模集成电路VLSI(Very Large Scale Integrated)结构复杂性最佳匹配的空间域重采 …

例句

One of the most famous was the "Berkeley VLSI Tools Tarball" , a set of UNIX utilities used to design early VLSI systems.

这其中最著名的是“伯克利分校的 VLSI 工具包”，这是一套 UNIX 的公用事业用于设计早期的 VLSI 系统。

Arising from the VLSI design and network communication, the cut width of a graph G is the minimum congestion for embedding G into a path.

起源于 VLSI 设计及网络通讯，一个图的割宽是将它嵌入于一条路的最小“拥挤度”。

As the density of VLSI circuit increases, the proximity effect has been one of the critical issues in optical lithography.

随着超大规模集成电路（VLSI）图形密度的增大，临近效应已成为光学光刻的关键问题之一。

The VLSI implementation of the CWT(continuous wavelet transform) can be divided into two methods: time-domain and frequency-domain.

连续小波变换的模拟电路实现方法大致可分为时域法和频域法。

of graphs has been used in the design of VLSI.

纵横嵌入的理论已被用在超大规模集成电路的设计中。

This paper addresses a low-cost VLSI implementation of the Advanced Encryption Standard (AES) cryptographic engine.

本篇论文描述一个低成本进阶加密标准加密引擎的积体电路实现。

Consequently, reduction of crosstalks between interconnection wires has become important in VLSI (very large scale integration) design.

因此，降低连线间的串音已成为现今超大型积体电路设计的一个重要议题。

Boundary-scan technology (BST) is a new and effective way of test and design-for-testability ( DFT ) for VLSI circuits.

边界扫描技术是一种新型的 VLSI 电路测试及可测性设计方法。

The final network has been implemented in custom VLSI, enabling letters to be sorted at high speed.

最终的网络已实施定制大规模集成电路，使信件在高速排序。

A method for threshold selection and decision to obtain noise characteristics in VLSI circuits was presented.

给出了利用阈值选取和决策对 VLSI 电路噪声特性进行检测的方法。

The next era began more or less with the publication of "Introduction to VLSI Systems" by Carver Mead and Lynn Conway in 1980.

下一个时代的开始或多或少与出版了“超大规模集成电路系统导论”的米德和 Lynn 康威在 1980 年。

In deep sub- micron VLSI technologies, the interconnect delay has become a dominant factor affecting performance of ICs.

在深次微米积体电路技术中，连线延迟成为了影响 IC 晶片效能的主要因素。

SOC (System-on-a-Chip) . is the development trend of current international VLSI and is the mainstream of IC development in the new century.

系统芯片 SOC 是当前国际 VLSI 的发展趋势和新世纪集成电路发展的主流。

The advantage and disadvantage of using ant colony algorithms is researched in VLSI routing.

研究在 VLSI 布线中采用蚁群算法的优劣性。

Modern VLSI CPUs also use a diode matrix for the read-only control store[citation needed].

而现代的大规模集成电路依然使用一个二极管矩阵做为只读控制存储器。

Accordingly, this phenomenon also must be taken into account when dealing with VLSI circuits, such as microprocessors or memory devices.

诚然，面对 VLSI 电路，这种现象同样必须加以考虑，如微处理器或存储器。

Making in the center of " 15 " in the plan, emphasize wanting to advance the industrialization of VLSI and new technology mainly.

中心在制定“十五”计划中，强调重点要推进超大规模集成电路和新技术的产业化。

These 3 circuits are used to design a PWM VLSI neural network to solve the exclusive or (XOR) problem.

以这 3 种电路为基础设计了一个解决异或（XOR）问题的 PWM 型 VLSI 神经网络。

The existing VLSI neural network design method based on the pulse width modulation (PWM) technique is modified in this paper.

改进了现有的基于脉宽调制（PWM）技术的 VLSI 神经网络设计方式。

At first, this thesis introduces the VLSI physical design process, based on this leads to the rectilinear Steiner tree problem.

本文首先介绍了超大规模集成电路的物理设计流程，在此基础上引出直角斯坦纳树问题。

High-level design intents such as finite state machine (FSM) and counter are commonly used in modern VLSI design.

高阶设计资讯被广泛的应用在现今超大型积体电路的设计上，如：有限状态机、计数器等等。

Advances in VLSI will have a profound effect on the world economy , because VLSI is the key technology for the Information Age .

超大规模集成电路的进展将对世界经济发生很大影响，因为它是信息时代的关键技术。

This paper pays attention to the practicability and superiority using ant colony algorithms in VLSI routing.

本文重点在于研究在 VLSI 布线中采用蚁群算法的实用性和优越性。

更新时间：2025-06-22 13:59