sequential design
序贯设计：指一种设计方法
常用释义
英式发音
美式发音
基本释义
- 序贯设计：指一种设计方法，按照一定的顺序和步骤进行设计，每个步骤的结果作为下一个步骤的输入。
例句
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1·Through comparison with traditional sequential design and control, both advantages and shortcomings are discussed, which shows promising future of simultaneous design and control optimization.通过与传统的工艺与控制分步序贯设计比较，讨论了二者各自的优势和不足，指出控制与工艺集成优化设计具有良好的发展前景。
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2·An interesting side effect of the copy-on-write design is that all writes to the file system become sequential writes (because remapping is always occurring).即写即拷设计的一个有趣的副作用是文件系统的所有写入都成为顺序写入(因为始终进行重新映射)。
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3·This problem also highlights one of the fundamental design principles when it comes to working with parallel data structures: Do not assume sequential execution of any code, ever.这个问题也突显了并发数据结构的基本设计原则之一：决不要假设任何代码会连续执行。
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4·Add a Sequential File stage to the top left portion of the job design area for the new parallel job.将Sequential File阶段添加到新并行作业作业设计区的左上部分。
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5·The design process, also sometimes termed as "problem solving process", includes a series of steps which usually (though not necessarily) follow a sequential order.设计过程有时也可称为“解决问题的过程”。它包括若干步骤，这些步骤通常(并非必然)有先后顺序。
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6·In design of pulsed asynchronous sequential circuits, it will solve for equations of clock and equations of state, on a symbolic Karnaugh map.在异步时序电路设计中，它将时钟方程和状态方程的求解归在统一的符号卡诺图上进行。
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7·Chapter two discusses the concurrent Engineering, including the concept of ce, the sequential and concurrent product design process and the concept and measurement of concurrent degree.第二章对并行工程的概念、产品设计的串行方式及并行方式、并行度的概念及量度方法作了深入地阐述。
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8·Sequential logic synthesis is an important part of RTL synthesis system design.时序逻辑综合是RTL综合系统设计中的一个重要部分。
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9·To effectively reduce the injection-machine mould-board weight, sequential optimization design method starting from high level topology optimization to low level parameter optimization was proposed.为了有效地降低注塑机模板的重量，提出了从高层次拓扑优化到底层次参数化优化的顺序优化设计方法。
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10·This paper has discussed the logic behaviour of flip-flops using the four valued logic and its applications in the analysis and design of pulsed asynchronous sequential logical networks.本文利用四值逻辑讨论了触发器的逻辑功能，并讨论四值逻辑在脉冲异步时序逻辑网络分析和设计中的应用。